Embark on a transformative journey with FPGA Designer Training, meticulously tailored for those passionate about FPGA design and optimization. Dive deep into the intricate workings of both ALTERA and Xilinx FPGA architectures, garnering a robust understanding that sets the foundation for successful FPGA projects. Our course walks you through the detailed nuances of the tool flows of these leading FPGA technologies, ensuring a seamless design experience.

Venture beyond just architectural insights, embracing the art of writing synthesizable codes, which is the cornerstone of any FPGA project. Harness the power of in-built libraries, understanding their intricate functionalities, and leverage them for efficient FPGA designs. Additionally, the training accentuates the crucial stages of downloading code into FPGA and offers hands-on experience on its debugging features. By the end of this course, be well-equipped with the expertise to tackle any FPGA challenge, ensuring optimal designs and smooth project executions.

Certificate

All participants will receive a Certificate of Completion from Tertiary Courses after achieved at least 75% attendance.

Funding and Grant

HRD Corp Claimable Course for Employers Registered with HRD Corp

Course Code: M424

Topic 1: Introduction to FPGA

• Cyclone/Stratix device Architecture

• Introduction to Quartus II

• Creating Project 

• Using Editor & Design Entry

Topic 2: Analysis and Elaboration

• I/O Assignment

• Configure voltage for I/0

• I/O Assignment Analysis

• Synthesis

• Netlist Viewer

Topic 3: Constraints

• Importance of Constraints in Design 

• Clock frequency

• Asynchronous & Synchronous Design

• False Path/Multicycle path

Day 2

Topic 4: Debugging Tools

• Power Analysis 

• SignalTap II embedded logic analyzer

• JTAG Chain Debug Tool

• In-System Memory Content Editor

Topic 5: Placing Design in FPGA

• Fitter (Place & Route)

• Chip Planner

• Assembler (Generating Programming file)

• Downloading Design in FPGA

Topic 6: Static Time analysis (STA)

• Running TimeQuest Timing Analyzer

• Understanding reports 

• Understand setup/hold violation & failing paths

• Constraining and understanding TCL Commands